Flash memory provides a good solution for electronically programmable (re-writeable) non-volatile data storage, and is therefore broadly utilized. Flash memory includes a memory array formed by a plurality of memory cells; each memory cell stores a binary bit by a storage transistor, such as a metal-oxide-semiconductor (MOS) field effect transistor including a gate, a drain, a source and a charge storage structure such as a floating gate.
To program a memory cell, i.e. to write a binary bit of data to a storage transistor of the memory cell, a drain voltage and a control-line program voltage are respectively applied to the drain and the gate of the transistor, such that charges (electrons) are injected to the floating gate, and hence the threshold voltage of the storage transistor is changed to memorize the bit. During programming, however, varying threshold voltage of the storage transistor also affects conduction of the storage transistor. For example, programming a p-channel MOS (PMOS) storage transistor raises its threshold voltage; as a result, the PMOS storage transistor tends to conduct greater drain current if the program voltage applied to the gate remains fixed during programming. Greater drain current requires to be supplied by circuitry of larger layout area and higher power consumption. In addition, greater drain current impacts efficiency of programming and reliability of memory cell, because greater drain current induces effect of channel hot hole in the channel between the drain and the source of the storage transistor. As the induced hot holes inject to the floating gate, electrons in the floating gate are annihilated to slow down the programming, and the gate oxide enclosing the floating gate suffers from extra damage.
In a prior art programming of a flash memory of PMOS storage transistors, if a first programming attempt for a storage transistor is verified to be failed, the control-line voltage applied to the gate of the storage transistor is increased to a predetermined second level higher than that of the first programming attempt, and is then constantly kept at the second level during a fixed interval for a second programming attempt. If the second programming attempt is verified to be failed, the control-line voltage is again increased to a predetermined third level higher than the second level used during the second program attempt, and then constantly remains the third level during a following fixed interval for a third programming attempt. That is, in response to failure of each programming attempt, the control-line voltage is increased to a higher constant level during a following fixed interval for a next programming attempt, until the control-line voltage reaches a predetermined maximum level.